DocumentCode
1993669
Title
Algorithms and architectures to computational systems implementation
Author
Carro, Luigi ; Suzim, Altamiro
Author_Institution
Dept. Comput. Sci., Univ. Federal do Rio Grande do Sul, Porto Alegre, Brazil
fYear
1994
fDate
21-23 Jun 1994
Firstpage
196
Lastpage
204
Abstract
This paper describes some techniques currently under research to explore hardware-software tradeoffs during a system development. We show that the moving of SW operations to HW can be further improved if the source code is modified in order to increase the overall parallelism of the system. We then show the limits of this approach and a new RISC architecture under research to overcome this limitations
Keywords
reduced instruction set computing; software engineering; RISC architecture; hardware-software tradeoffs; parallelism; system development; CMOS technology; Computational modeling; Computer architecture; Computer science; Design automation; Microcomputers; Microprocessors; Motor drives; Parallel processing; Reduced instruction set computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 1994. Shortening the Path from Specification to Prototype. Proceedings., Fifth International Workshop on
Conference_Location
Grenoble
Print_ISBN
0-8186-5885-1
Type
conf
DOI
10.1109/IWRSP.1994.315893
Filename
315893
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