Project Spinnaker: a new generation of rapid prototyping system

Author

Courtoy, Michel

Author_Institution

Quickturn Syst. Inc., Mountain View, CA, USA

fYear

1994

fDate

21-23 Jun 1994

Firstpage

141

Lastpage

144

Abstract

Logic emulation systems based on FPGAs are becoming a widely accepted solution for the verification of large, complex designs. However, the acceptance of this technology is still lagging for the verification of ASIC designs with 50,000 gates or less of custom logic. This paper presents Project Spinnaker, a project aimed at the development of a rapid prototyping solution for this market segment. The project emphasizes what are believed to be the three key aspects for broadening the acceptance of the emulation verification methodology among ASIC designers: speed, cost, and automation

Keywords

application specific integrated circuits; logic CAD; logic analysers; logic arrays; software prototyping; ASIC designs; FPGA; Project Spinnaker; acceptance; automation; cost; custom logic gates; emulation verification methodology; large complex design verification; logic emulation systems; market segment; rapid prototyping system; speed; Application specific integrated circuits; Costs; Design methodology; Emulation; Field programmable gate arrays; Logic design; Logic testing; Programmable logic arrays; Prototypes; Software prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 1994. Shortening the Path from Specification to Prototype. Proceedings., Fifth International Workshop on

Conference_Location

Grenoble

Print_ISBN

0-8186-5885-1

Type

conf

DOI

10.1109/IWRSP.1994.315901

Filename

315901