Title :
Degradation of deep sub-micron isolation by vacuum ultraviolet radiation from low temperature back end plasma-assisted processes
Author :
Ashburn, S.P. ; Krishnan, S. ; Dixit, G.A. ; Rodder, M. ; Taylor, K. ; Breedijk, T. ; Chen, I.-C. ; Goodwin, M.W. ; Esquivel, A.L.
Author_Institution :
Semicond. Process & Device Center, Texas Instrum. Inc., Dallas, TX, USA
Abstract :
For advanced sub-micron CMOS technologies, the trend is to use lower temperature post-SALICIDE processing to minimize degradation to narrow gate sheet resistance and source/drain series resistance. Plasma assisted deposition processes may be used to accomplish this. The potential impact of these plasma-assisted processes on gate oxide reliability has been well documented, but the impact of these processes on isolation oxide has not been reported. This study investigates the effect of plasma damage on isolation performance for deep sub-micron spaces. The plasma damage is found to degrade isolation by the formation of positive charge in the isolation oxide due to vacuum ultraviolet (VUV) radiation. This positive charge results in the formation of an inversion (accumulation) layer in the p-well (n-well) at the isolation oxide/Si interface, which forms a conduction path from n/sup +/-nwell, while p/sup +/-pwell leakage is eliminated. The proposed VUV degradation mechanism is supported by the lack of damage to poly-gated antenna test structures as well as the lack of damage to field isolation test structures that are fully covered by poly-Si, which is opaque to VUV radiation for 3 eV/spl les/h/spl nu//spl les/20 eV (SiO/sub 2/ E/sub g//spl ap/9 eV). The results are the first to demonstrate that isolation structures, with primarily exposed oxide regions, may be damaged by plasma VUV radiation, which goes undetected with normal poly-gated antenna test structures with primarily poly over oxide regions.
Keywords :
CMOS integrated circuits; integrated circuit reliability; isolation technology; plasma deposition; radiation effects; VUV degradation mechanism; VUV radiation; accumulation layer; conduction path; deep submicron isolation degradation; inversion layer formation; isolation oxide; isolation oxide/Si interface; low temperature back end plasma-assisted processes; n-well; p-well; plasma assisted deposition processes; plasma damage; positive charge formation; post-salicide processing; submicron CMOS technologies; vacuum ultraviolet radiation; CMOS technology; Contact resistance; Degradation; Plasma applications; Plasma devices; Plasma materials processing; Plasma sources; Plasma temperature; Testing; Voltage;
Conference_Titel :
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-4100-7
DOI :
10.1109/IEDM.1997.650421