DocumentCode :
1994792
Title :
Heterogeneous CPU/FPGA Reconfigurable Computing System for Avionic Test Application
Author :
Afonso, George ; Baklouti, Zeineb ; Duvivier, David ; Ben Atitallah, Rabie ; Billauer, Eli ; Stilkerich, Stephan
fYear :
2013
fDate :
20-24 May 2013
Firstpage :
260
Lastpage :
267
Abstract :
Real-time computing systems are increasingly used in aerospace and avionic industries. In the face of power wall and real-time requirements, hardware designers are directed towards reconfigurable computing with the usage of heterogeneous CPU/FPGA systems. However, there is a lack of real-time environments able to deal with the execution of applications on such heterogeneous systems dedicated to avionic Test and Simulation (T&S). This research investigates the problem of soft real-time environments for CPU/FPGA systems and proposes first a high-performance hardware architecture used to implement intimately coupled hardware and software avionic models. Second, this paper presents the description of an efficient real-time software environment for the model´s execution, the multi-core CPU monitoring and the runtime task re-allocation to avoid the timing constraint violation. Experimental results underpin the industrial relevance of the presented approach for avionic T&S systems with real-time support.
Keywords :
aerospace computing; aerospace simulation; aerospace testing; avionics; field programmable gate arrays; multiprocessing systems; parallel architectures; real-time systems; reconfigurable architectures; aerospace industries; avionic T and S systems; avionic industries; avionic test and simulation; coupled hardware software avionic models; heterogeneous CPU-FPGA reconfigurable computing SYSTEM; high-performance hardware architecture; multicore CPU monitoring; power wall; real-time computing systems; real-time requirements; reconfigurable computing; runtime task reallocation; soft real-time environments; timing constraint violation; Adaptation models; Aerospace electronics; Computer architecture; Field programmable gate arrays; Hardware; Real-time systems; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-4979-8
Type :
conf
DOI :
10.1109/IPDPSW.2013.111
Filename :
6650894
Link To Document :
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