• DocumentCode
    1994832
  • Title

    Multicore encryption and authentication on a reconfigurable hardware

  • Author

    Ghosh, Saheli ; Das, Subha Jyoti ; Paul, Rourab ; Chakrabarti, Amlan

  • Author_Institution
    Comput. Sci. & Eng., RCC Inst. of Technol., Kolkata, India
  • fYear
    2015
  • fDate
    9-11 July 2015
  • Firstpage
    173
  • Lastpage
    177
  • Abstract
    Security has always been the toughest challenge in data communication, at the same time it is the biggest necessity in transmitting confidential data. Sensitive data are often at stake when they are deployed in a network. Embedded system design is a very popular research activity as it has a wide range of applications namely, security and surveillance, personal digital assistant, biomedical systems, mobile and pervasive communication gadgets, along with its huge speed compared to very popular software designs. Most of the embedded system applications involve data communication between multiple parties. To add to it, sensor technology requires physically secured systems, which can be dealt with cryptographic and hashing algorithms. However, a parallel implementation of Encryption and Hashing algorithm will cost the efficiency and performance speed of the system. To overcome the shortcomings a multi-core system, capable of parallely executing authentication and encryption is proposed. In this proposal a encryption algorithm and a hash algorithm are placed into two ARM cortex processor of ZYNQ 7020-clg484 FPGA board using ISE 14.4 design suite. The true parallel execution of both algorithms increases system throughput. The soft core IPs(RS232 and Ethernet) are placed in FPGA region to handle realtime data.
  • Keywords
    cryptography; data communication; data privacy; field programmable gate arrays; message authentication; parallel processing; ARM cortex processor; Ethernet; ISE 14.4 design suite; RS232; ZYNQ 7020-clg484 FPGA board; confidential data transmission; cryptographic algorithm; data communication; embedded system applications; embedded system design; hashing algorithm; multicore authentication; multicore encryption; parallel implementation; physically secured systems; reconfigurable hardware; security; sensor technology; soft core IPs; Algorithm design and analysis; Authentication; Encryption; Field programmable gate arrays; Hardware; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Recent Trends in Information Systems (ReTIS), 2015 IEEE 2nd International Conference on
  • Conference_Location
    Kolkata
  • Type

    conf

  • DOI
    10.1109/ReTIS.2015.7232873
  • Filename
    7232873