Title :
TSHMEM: Shared-Memory Parallel Computing on Tilera Many-Core Processors
Author :
Lam, Bryant C. ; George, Alan D. ; Lam, H.K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
Abstract :
With many-core processor architectures emerging, concerns arise regarding the productivity of numerous parallel programming tools, models, and languages as developers from a broad spectrum of science domains struggle to maximize performance and maintain correctness of their applications. Fortunately, a partitioned global address space (PGAS) programming model has demonstrated realizable performance and productivity potential for large parallel computing systems with distributed-memory architectures. One such PGAS approach is SHMEM, a lightweight, shared-memory programming library. Renewed interest for SHMEM has developed around Oppenheim, a recent community-led effort to produce a standardized specification for the SHMEM library amidst incompatible commercial implementations. This paper presents and evaluates the design of TSHMEM (short for TileSHMEM), a new OpenSHMEM library for the Tilera TILE-Gx8036 and TILEPro64 many-core processors. TSHMEM is built atop Tilera-provided libraries with key emphasis upon realizable performance with those libraries, demonstrated through micro benchmarking. Furthermore, SHMEM application portability is illustrated with two case studies. TSHMEM successfully delivers high performance with ease of programmability and portability for SHMEM applications on TILE-Gx and TILEPro architectures.
Keywords :
distributed memory systems; parallel programming; shared memory systems; OpenSHMEM library; PGAS programming model; TSHMEM; Tilera many-core processor architecture; distributed-memory architectures; large parallel computing systems; parallel programming tools; partitioned global address space programming model; shared-memory parallel computing; shared-memory programming library; Bandwidth; Computer architecture; Electronics packaging; Libraries; Program processors; Synchronization; Tiles; high-performance computing; parallel architectures; parallel programming; performance analysis;
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-4979-8
DOI :
10.1109/IPDPSW.2013.154