DocumentCode
1995056
Title
Ultra thin (<3 nm) high quality nitride/oxide stack gate dielectrics fabricated by in-situ rapid thermal processing
Author
Kim, B.Y. ; Luan, H.F. ; Kwong, D.L.
Author_Institution
Microelectron. Res. Center, Texas Univ., Austin, TX, USA
fYear
1997
fDate
10-10 Dec. 1997
Firstpage
463
Lastpage
466
Abstract
In this paper, ultra thin (<3 nm) Si/sub 3/N/sub 4//SiO/sub 2/ stack layer with significant lower leakage current, superior boron diffusion barrier properties, and reliability compared with SiO/sub 2/ of identical thickness have been fabricated by in-situ RTP processing. These results demonstrate for the first time that ultra thin LPCVD Si/sub 3/N/sub 4/ can be used as gate dielectrics, contrary to those conclusions made previously on thicker LPCVD Si/sub 3/N/sub 4/.
Keywords
CVD coatings; dielectric thin films; diffusion barriers; leakage currents; rapid thermal processing; silicon compounds; LPCVD; Si/sub 3/N/sub 4/-SiO/sub 2/; Si:B; boron diffusion barrier; in-situ rapid thermal processing; leakage current; reliability; ultra thin nitride/oxide stack gate dielectric; Annealing; Boron; Capacitance-voltage characteristics; Dielectrics; Hot carriers; Hysteresis; Interface states; Leakage current; MOS devices; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Conference_Location
Washington, DC, USA
ISSN
0163-1918
Print_ISBN
0-7803-4100-7
Type
conf
DOI
10.1109/IEDM.1997.650424
Filename
650424
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