Title :
A monolithic CMOS MEMS accelerometer with chopper correlated double sampling readout circuit
Author :
Wang, Chun-Kai ; Chen, Che-Sheng ; Wen, Kuei-Ann
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A monolithic CMOS MEMS capacitive accelerometer with micropower analog readout circuit is presented in this paper. In order to optimize noise-power performance of accelerometer in limited area, a specification driven MEMS/IC co-design flow is adopted. In analog readout circuit design, the proposed circuit architecture combines chopper stabilization and correlated double sampling to suppress low frequency noise and compensate DC offset. The RMS input referred noise voltage is 9.82 nV/√Hz under 100Hz. The power consumption is 36uW at 100kHz modulation frequency.
Keywords :
CMOS integrated circuits; accelerometers; analogue integrated circuits; integrated circuit design; microsensors; readout electronics; RMS input referred noise voltage; chopper correlated double sampling readout circuit; chopper stabilization; correlated double sampling; frequency 100 kHz; frequency 1000 Hz; low frequency noise suppression; micropower analog readout circuit design; monolithic CMOS MEMS capacitive accelerometer; noise-power performance; power 36 muW; specification driven MEMS-IC codesign flow; voltage 9.82 nV; Accelerometers; Bandwidth; CMOS integrated circuits; Choppers; Micromechanical devices; Noise; Sensors;
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
DOI :
10.1109/ISCAS.2011.5937993
