Title :
Comparative analysis of various 9T SRAM cell at 22-nm technology node
Author :
Roy, Chandaramauleshwar ; Islam, Aminul
Author_Institution :
Dept. of Electron. & Commun. Eng., Birla Inst. of Technol., Ranchi, India
Abstract :
This article presents a comparative analysis of various 9T SRAM cell at 22-nm technology node. Using Monte-Carlo simulations critical design metrics of various 9T SRAM cells are estimated. UV9T (ultralow voltage 9T SRAM cell) offers shortest read delay and DF9T (disturb-free 9T SRAM cell) exhibits longest read delay. SF9T (supply feedback 9T SRAM cell) offers shortest write delay and DFsub9T (disturb-free subthreshold 9T SRAM cell) shows longest write delay. SF9T consumes lower write power compared to other cells. RSNM (read static noise margin) of DF9T, DFsub9T and UV9T are same and equal to 230 mV as they are read decoupled. Although it is read decoupled, SF9T shows 2.19× lower RSNM due to supply gating. SF9T offers 1.70×, 1.68×, 1.21× higher WSNM compared to UV9T, DF9T and DFsub9T respectively. SF9T benefits from shorter write delay, lower write power consumption and higher WSNM at cost of lower RSNM. The designs offering lower read/write delay, write power, higher WSNM and RSNM are reported, to aid the designer in selecting the best cell depending on specific requirements.
Keywords :
Monte Carlo methods; SRAM chips; low-power electronics; DF9T; DFsub9T; Monte-Carlo simulations; RSNM; SF9T; UV9T; WSNM; disturb-free 9T SRAM cell; disturb-free subthreshold 9T SRAM cell; longest read delay; read static noise margin; size 22 nm; supply feedback 9T SRAM cell; technology node; ultralow voltage 9T SRAM cell; voltage 230 mV; write delay; write static noise margin; Delays; Discharges (electric); Noise; SRAM cells; Wireless sensor networks; Writing; CMOS; RSNM; WSNM; read delay; read power; write delay; write power;
Conference_Titel :
Recent Trends in Information Systems (ReTIS), 2015 IEEE 2nd International Conference on
Conference_Location :
Kolkata
DOI :
10.1109/ReTIS.2015.7232929