Operation Synchronization Technique on Pipeline-Based Hardware Synthesis Applying Stream-Based Computing Framework

Increasing the needs for real-time processing of information flood from environment surrounded us acquired by the advanced sensing technologies, any application acquiring such information requires a processing ability for large input dataflow that must be processed within a restricted short time. In order to achieve the required processing performance, we often consider pipeline-based hardware implementation. The timing for activating operators for input data in the design must be scheduled carefully arranging the timings for I/O among operators. However, when we need to revise the algorithm itself or any parameters, it is very hard to reschedule the activation timings of operators considering the design goals regarding the maximum frequency and the resource size. This paper shows a technique to schedule operation timings synchronizing the input data in a processing pipeline of hardware applying the stream-based computing framework using OpenCL kernel description. This paper especially proposes a new compiler-based approach for synthesizing the pipeline-based hardware applying a novel technique for calculating the timings at the operators´ activation called the Pipeline Timing Adjustment (PTA). This paper mainly discusses the algorithm of the PTA and show the effect of the algorithm.