Title :
Decreasing Network Power with on-off Links Informed by Scientific Applications
Author_Institution :
Sandia Nat. Labs. Livermore, Livermore, CA, USA
Abstract :
As the tapering off of Moore´s Law produces the need for more parallelism in high-performance applications, the parallel programming model becomes central to achieving and maintaining performance per watt on current and future computer architectures. In order for a programmer to exploit parallelism in a power-efficient way, a close interaction with an abstract machine model is necessary to remain cognizant of important power-performance tradeoffs. This work introduces Asynchronous Circuit Programming (ACP), a way of explicitly identifying application communication as circuits to allow the underlying hardware to better execute code, and for a programmer to pipeline the allocation of communication hardware resources with computation. We provide a case study in using a preliminary C++ implementation of ACP with multiple scientific applications that illustrates how hardware can make use of application knowledge, keeping up to 75% of links in a low-power state.
Keywords :
C++ language; parallel programming; program compilers; ACP; abstract machine model; asynchronous circuit programming; high-performance applications; multiple scientific applications; network power; on-off links; parallel programming model; preliminary C++ implementation; Arrays; Computational modeling; Hardware; Integrated circuit modeling; Object oriented modeling; Parallel processing; Programming; high-performance computing; parallel programming; power-aware computing;
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-4979-8
DOI :
10.1109/IPDPSW.2013.190