DocumentCode
1996920
Title
The arbiter-PUF with high uniqueness utilizing novel arbiter circuit with Delay-Time Measurement
Author
Fruhashi, Kota ; Shiozaki, Mitsuru ; Fukushima, Akitaka ; Murayama, Takahiko ; Fujino, Takeshi
Author_Institution
Grad. Sch. of Sci. & Eng., Ritsumeikan Univ., Kusatsu, Japan
fYear
2011
fDate
15-18 May 2011
Firstpage
2325
Lastpage
2328
Abstract
Physical Unclonable Functions (PUFs) have been proposed to produce tamper-resistant device or create unique identifications of the secure systems. The conventional basic arbiter-PUF was fabricated with 0.18μm CMOS technology, and the uniqueness of generated multi-bit responses was evaluated. The uniqueness is inadequate than expected because some of multi-bit responses are never generated. In this study, we propose a novel arbiter-PUF utilizing a RG-DTM (Response Generation according to Delay Time Measurement) scheme. The uniqueness is evaluated by the standard deviation of the Hamming Distance distribution between generated 256-bit responses. The standard deviation on the proposed PUFs is greatly improved to 8.45 from 31 on the conventional PUFs.
Keywords
CMOS integrated circuits; cryptography; delays; CMOS technology; Hamming distance distribution; RG-DTM; arbiter circuit; arbiter-PUF; delay-time measurement; multibit responses; physical unclonable functions; response generation; size 0.18 mum; tamper-resistant device; word length 256 bit; Decision support systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location
Rio de Janeiro
ISSN
0271-4302
Print_ISBN
978-1-4244-9473-6
Electronic_ISBN
0271-4302
Type
conf
DOI
10.1109/ISCAS.2011.5938068
Filename
5938068
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