DocumentCode :
1997551
Title :
Reducing the Cost of Measuring Memory Hierarchy Communication Parameters
Author :
Feng Jiang ; Sussman, Aaron
Author_Institution :
Dept. of Comput. Sci., George Washington Univ., Washington, DC, USA
fYear :
2013
fDate :
20-24 May 2013
Firstpage :
1226
Lastpage :
1233
Abstract :
For parallelizing compilers that target multi-core machines, some hardware information is very useful in producing optimized code. One approach to obtain such information is extracting the characteristics of the hardware from a set of performance data collected by performing extensive measurements on the computer system. However, such measurements tend to be heavy-weight and time-consuming, which makes them unable to complete in a reasonable amount of time, especially on a large-scale system. We propose an algorithm to minimize the required measurements on a computer system using the tree structure of the memory hierarchy, that divides resources into equivalence classes so that different members of an equivalence class do not require separate measurements. Correctness arguments for the algorithms are presented, along with results that show the effectiveness and performance of the algorithms.
Keywords :
multiprocessing systems; program compilers; tree data structures; computer system; equivalence classes; hardware information; large scale system; memory hierarchy communication parameters; multicore machines; optimized code; parallelizing compilers; tree structure; Algorithm design and analysis; Educational institutions; Memory management; Multicore processing; Program processors; Size measurement; Time measurement; measurement; optimization; parallelizing compiler;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International
Conference_Location :
Cambridge, MA
Print_ISBN :
978-0-7695-4979-8
Type :
conf
DOI :
10.1109/IPDPSW.2013.52
Filename :
6651009
Link To Document :
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