A fully systolic adaptive filter implementation

The authors describe the algorithmic and architectural structure of a representative case of the Harris Semiconductor systolic LMS (least mean square) implementations. Comparison of the systolic and standard transversal LMS implementations of an adaptive filter are given. All of the architectures have a common structure: a systolic tap weight update section followed by a systolic FIR (finite impulse response) filter section. The key to these architectures is a modified coefficient update methodology which facilitates the interface between the two sections. The effects of this methodology are presented. Simulations have shown that the convergence of the systolic filters is comparable to that of the transversal filter for a wide range of filter parameters