Suppressed short-channel effects and improved stability in polysilicon thin film transistors with very thin ECR N/sub 2/O-plasma gate oxide

Author

Jin-Woo Lee ; Nae-In Lee ; Sung-Hoi Hur ; Chul-Hi Han

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea

fYear

1997

fDate

10-10 Dec. 1997

Firstpage

519

Lastpage

522

Abstract

Short-channel polysilicon thin film transistors with very thin (12 nm) electron cyclotron resonance N/sub 2/O-plasma gate oxide are investigated. Short-channel effects are drastically suppressed using ECR N/sub 2/O-plasma gate oxide. The fabricated n-channel TFTs exhibit a very small threshold voltage shift (<50 mV) and ON current change (<3%) after an electrical stress of 2/spl times/10/sup 4/ sec with Vgs=Vds=5 V.

Keywords

MOSFET; dielectric thin films; elemental semiconductors; silicon; stability; thin film transistors; 12 nm; 5 V; N/sub 2/O; Si; electron cyclotron resonance plasma; n-channel TFT; polysilicon thin film transistors; short-channel effects suppression; stability improvement; thin ECR N/sub 2/O-plasma gate oxide; threshold voltage shift; Atomic force microscopy; Atomic layer deposition; Crystallization; Nitrogen; Oxidation; Rough surfaces; Stability; Thermal stresses; Thin film transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-4100-7

Type

conf

DOI

10.1109/IEDM.1997.650437

Filename

650437