DocumentCode :
1997864
Title :
Optimization of a high density gallium nitride based non-isolated point of load module
Author :
Reusch, David ; Lee, Fred C. ; Gilham, David ; Su, Yipeng
Author_Institution :
Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear :
2012
fDate :
15-20 Sept. 2012
Firstpage :
2914
Lastpage :
2920
Abstract :
The demand for future power supplies to achieve higher output currents, smaller size, and higher efficiency cannot be achieved with conventional technologies. There are limitations in the packaging parasitics, thermal management, and layout parasitics that must be addressed to push for higher frequencies and improved power density. To address these limitations, the use of integrated 3D point of load (POL) converters utilizing GaN transistors, low profile magnetic substrates, and ceramic substrates with high thermal conductivity will be considered. This paper will discuss the effect of parasitics on the performance of high frequency GaN POLs, methods to improve the circuit layout of a highly integrated 3D integrated POL module, and the thermal design of a high density module using advanced substrates. The final demonstration is a 900W/in3 12V 2MHz Alumina DBC GaN converter which offers unmatched power density compared to state of the art industry products and research.
Keywords :
III-V semiconductors; alumina; ceramic packaging; gallium compounds; integrated circuit design; integrated circuit layout; integrated circuit packaging; optimisation; power convertors; power transistors; radiofrequency integrated circuits; thermal management (packaging); wide band gap semiconductors; Al2O3-GaN; alumina DBC converter; ceramic substrate; circuit layout; frequency 12 MHz; high thermal conductivity; integrated 3D POL converter; integrated 3D point of load converter; layout parasitic; magnetic substrate; nonisolated point of load module; optimization; packaging parasitic; power density; power supply demand; thermal management design; transistor; voltage 12 V; Gallium nitride; Inductance; Layout; Performance evaluation; Silicon; Substrates; Switching loss;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Energy Conversion Congress and Exposition (ECCE), 2012 IEEE
Conference_Location :
Raleigh, NC
Print_ISBN :
978-1-4673-0802-1
Electronic_ISBN :
978-1-4673-0801-4
Type :
conf
DOI :
10.1109/ECCE.2012.6342367
Filename :
6342367
Link To Document :
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