DocumentCode :
1998038
Title :
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors
Author :
Sun, Yanan ; Kursun, Volkan
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
2513
Lastpage :
2516
Abstract :
The influence of substrate voltage on carbon nanotube MOSFET (CN-MOSFET) performance is investigated in this paper. The optimum device profiles with different transistor sizes are identified for achieving the highest on-state to off-state current ratio (Ion/Ioff)Tradeoffs between subthreshold leakage current and device performance are evaluated with different substrate bias voltages. Technology development guidelines are provided for achieving low-leakage, high-speed, area efficient, and manufacturable integrated circuits with carbon nanotube transistors.
Keywords :
MOSFET; carbon nanotubes; leakage currents; C; CN-MOSFET; N-channel carbon nanotube transistor; bottom gate voltage consideration; integrated circuit; on-state to off-state current ratio; size 16 nm; substrate bias voltage; subthreshold leakage current; Degradation; Electron tubes; Logic gates; Nanotubes; Performance evaluation; Substrates; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location :
Rio de Janeiro
ISSN :
0271-4302
Print_ISBN :
978-1-4244-9473-6
Electronic_ISBN :
0271-4302
Type :
conf
DOI :
10.1109/ISCAS.2011.5938115
Filename :
5938115
Link To Document :
بازگشت