Title :
Tunable Transient Filters for Soft Error Rate Reduction in Combinational Circuits
Author :
Zhou, Quming ; Choudhury, Mihir R. ; Mohanram, Kartik
Author_Institution :
Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX
Abstract :
This paper describes a tunable transient filter (TTF) design for soft error rate reduction in combinational logic circuits. TTFs can be inserted into combinational circuits to suppress propagated single- event upsets (SEUs) before they can be captured in latches/flip- flops. TTFs are tuned by adjusting the maximum width of the propagated SEU that can be suppressed. TTFs require 6-14 transistors, making them an attractive cost-effective option to reduce the soft error rate in combinational circuits. A global optimization approach based on geometric programming that integrates TTF insertion with dual-VoD and gate sizing is described. Simulation results for the 70 nm process technology indicate that a 17-48X reduction in the soft error rate can be achieved with this approach.
Keywords :
combinational circuits; errors; filters; geometric programming; combinational logic circuits; flip-flops; gate sizing; geometric programming; global optimization; latches; soft error rate reduction; tunable transient filter; Circuit simulation; Combinational circuits; Error analysis; Error correction; Filters; Flip-flops; Latches; Single event transient; Single event upset; Tunable circuits and devices; circuit optimization; fault avoidance; filters; radiation hardening; soft errors;
Conference_Titel :
Test Symposium, 2008 13th European
Conference_Location :
Verbania
Print_ISBN :
978-0-7695-3150-2
DOI :
10.1109/ETS.2008.39