Title :
Potential of 0.5 μm SOI CMOS process towards low voltage, low power RF applications in multigigahertz regime
Author :
Bhatia, R. ; Jalan, U. ; Chakraborty, S. ; Yoon, S.-W. ; Nuttinck, S. ; Pinel, S. ; Nobbe, D. ; Laskar, J.
Author_Institution :
Yamacraw Design Center, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Silicon on insulator (SOI) has emerged as a strong contender for low power RF applications. This paper demonstrates the potential of SOI technology towards the development of next generation RF front ends. The capabilities of a 0.5 μm SOI technology are illustrated by the design and fabrication of a low supply voltage, low power VCO operating at 1.8 GHz. The VCO operates with supply voltage as low as 1 V. The tuning range was measured to be 14% and the measured phase noise was -117.5 dBc/Hz at an offset frequency of 1 MHz from the 1.77 GHz carrier. The VCO and the buffers consume 14.7 mW power from a 1.5 V supply. We also demonstrate the development, fabrication and measurement of anti-parallel dioxide pair (APDP) structures towards subharmonic mixers in this technology.
Keywords :
CMOS integrated circuits; UHF oscillators; circuit tuning; mixers (circuits); phase noise; radiofrequency integrated circuits; silicon-on-insulator; voltage-controlled oscillators; 0.5 mum; 1 MHz; 1 V; 1.5 V; 1.77 GHz; 1.8 GHz; 14.7 mW; SOI CMOS process; antiparallel dioxide pair structures; low power RF applications; multigigahertz regime; offset frequency; phase noise; silicon on insulator; subharmonic mixers; tuning range; CMOS process; CMOS technology; Fabrication; Frequency measurement; Low voltage; Noise measurement; Phase measurement; Radio frequency; Silicon on insulator technology; Voltage-controlled oscillators;
Conference_Titel :
Radio and Wireless Conference, 2003. RAWCON '03. Proceedings
Print_ISBN :
0-7803-7829-6
DOI :
10.1109/RAWCON.2003.1227953