Novel VLSI architecture for two-dimensional radon transform computations

This paper reviews a VLSI architecture based on `Parallel Pipeline Projection Engine´ (PPPE) which is composed by Forward Radon Transform and Back-projection architecture. This PPPE architecture is modified by using the theory of two-dimensional Radon Transform. The novel architecture is primarily based on analytical relationship between the pixels on horizontal and vertical raster scan line and also between the projection angles. A new concept of Processing Blocks (PB) is developed with help of the theory of Radon Transform. In this novel PPPE architecture, the PB blocks can drive a large numbers of Processing Element (PE) blocks with some limitations. This limitation is also accounted by some error function from where the correct numbers of PE blocks are derived. The top level implementations have done for both of the existing and modified architecture and compared them by using Xilinx ISE simulator. Synthesized results for both of the novel and existing PPPE architecture has been done on `Field Programmable Gate Array´ (FPGA). It has been observed that novel PPPE architecture uses less numbers of hardware resources (multipliers, adders/subtractors) and as a result this modified architecture reduces the computational complexity, delay and latency as compared to the existing one.