A novel representation for repeated placement

Recently, exploring repeated placements has been researched to apply on-chip processor array, which consists of the array of the same processors. This representation may also be used for the design of FPGA, scheduling of pipeline, and others. For this purpose, sequence-triple, representation for repeated placement, was proposed. However, it cannot represent a certain kind of placements but contains so many redundant codes. In this paper, we propose a novel representation method for repeated placement, which can represent any horizontal prior Horizontal-Vertical-Relation-Set. Also, we propose a decoding algorithm of the representation, which takes O(n³) time, where n is the number of rectangles in each cycle.