Title :
Reducing Startup Time in Co-Designed Virtual Machines
Author :
Hu, Shiliang ; Smith, James E.
Author_Institution :
Dept. of Comput. Sci., Wisconsin Univ., Madison, WI
Abstract :
A co-designed virtual machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventional (legacy) ISA into optimized code for an underlying implementation-specific ISA. Because translation is done dynamically, an important consideration in such systems is the startup time for performing the initial translations. Beginning with a previously proposed co-designed VM that implements the x86 ISA, we study runtime binary translation overhead effects. The co-designed x86 virtual machine is based on an adaptive translation system that uses a basic block translator for initial emulation and a superblock translator for hotspot optimization. We analyze and model VM startup performance via simulation. We observe that non-hotspot emulation via basic block translation is the major part of the startup overhead. To reduce startup translation overhead, we follow the co-designed hardware/software philosophy and propose hardware assists to dramatically accelerate basic block translations. By combining hardware assists with balanced translation strategies, the co-designed translation system reduces runtime overhead significantly and demonstrates very competitive startup performance when compared with conventional processors running a set of Windows application benchmarks
Keywords :
hardware-software codesign; optimising compilers; program interpreters; virtual machines; Windows application benchmarks; adaptive translation system; basic block translator; codesigned virtual machines; dynamic binary translation; hotspot optimization; optimized code; runtime binary translation; runtime overhead; startup translation overhead; superblock translator; Acceleration; Adaptive systems; Analytical models; Emulation; Hardware; Instruction sets; Performance analysis; Runtime; Virtual machining; Virtual manufacturing;
Conference_Titel :
Computer Architecture, 2006. ISCA '06. 33rd International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-7695-2608-X
DOI :
10.1109/ISCA.2006.33