Title :
Implementing a complex FIR filter on a novel parallel DSP architecture
Author :
Grigore, Adrian ; Pralea, Radu ; Enescu, Andrei Alexandru
Author_Institution :
Freescale Semicond., Bucharest, Romania
Abstract :
The current paper describes a novel high-parallel architecture of a DSP (Digital Signal Processing) core and depicts optimizing techniques for implementation using the affiliated compiler. A demonstrative benchmark is presented for a FIR (Finite Impulse Response) complex filter, emphasizing differences over known digital signal processors.
Keywords :
FIR filters; digital signal processing chips; parallel architectures; complex FIR filter; digital signal processing core; finite impulse response filter; high-parallel DSP architecture; Baseband; Digital signal processing; Finite impulse response filters; Multicore processing; Program processors; Registers; FIR filter; Parallel DSP; VLES;
Conference_Titel :
Signals, Circuits and Systems (ISSCS), 2013 International Symposium on
Conference_Location :
Iasi
Print_ISBN :
978-1-4799-3193-4
DOI :
10.1109/ISSCS.2013.6651182
