DocumentCode
2002216
Title
Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. No.98TB100236)
fYear
1998
fDate
25-25 Aug. 1998
Abstract
The following topics were dealt with: embedded memory design aids; embedded DRAM; algorithms and testing techniques; DRAM fault modeling; SRAM characterization and test; CAM testing; unique fault models; memory repair
Keywords
DRAM chips; SRAM chips; content-addressable storage; embedded systems; fault diagnosis; integrated circuit design; integrated circuit testing; memory architecture; CAM testing; DRAM fault modeling; SRAM characterization; SRAM test; algorithms; embedded DRAM; embedded memory design aids; fault models; memory design; memory repair; memory technology; testing techniques;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1998. Proceedings. International Workshop on
Conference_Location
San Jose, CA, USA
Print_ISBN
0-8186-8494-1
Type
conf
DOI
10.1109/MTDT.1998.705937
Filename
705937
Link To Document