• DocumentCode
    2002592
  • Title

    Enhancing Verification Efficiency via Dynamically Focused, Selective and Intrusive Transactions

  • Author

    Ngo, Thinh

  • Author_Institution
    MediaTek Wireless Inc., Austin, TX
  • fYear
    2008
  • fDate
    8-10 Dec. 2008
  • Firstpage
    75
  • Lastpage
    80
  • Abstract
    Identifies redundant verifications in the brute-force simulation approach. Explores a methodology to enhance verification efficiency. Randomized transactions are dynamically focused, selected based on DUT feedback and intrusively used to force DUT into states of interest. The methodology is applied in the verification of a DSP data cache.
  • Keywords
    formal verification; hardware description languages; DSP data cache; brute-force simulation; dynamically focused transactions; intrusive transactions; randomized transactions; redundant verifications; selective transactions; verification efficiency enhancing; Automatic testing; Automation; Buffer storage; Computer bugs; Digital signal processing; Force feedback; Microprocessors; Random access memory; State feedback; System testing; Corner-cases; Simulation; SystemVerilog; Testbench; Transaction; Verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification, 2008. MTV '08. Ninth International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-4093
  • Print_ISBN
    978-1-4244-3682-8
  • Type

    conf

  • DOI
    10.1109/MTV.2008.18
  • Filename
    5070938