DocumentCode
2003104
Title
Designing LDPC codes using cyclic shifts
Author
Okamura, Toshihiko
Author_Institution
Internet Syst. Res. Lab., NEC Corp., Kanagawa, Japan
fYear
2003
fDate
29 June-4 July 2003
Firstpage
151
Abstract
This paper presents a method to construct LDPC codes by arranging cyclic shift matrices. These codes perform well at various rates for moderate code length. By substituting those cyclic shifts for their Kronecker products with small random permutations, the performance of long codes can be improved, while the structure facilitates hardware implementation.
Keywords
matrix algebra; parity check codes; Kronecker products; LDPC codes; cyclic shift matrices; moderate code length; random permutations; Decoding; Genetic mutations; Hardware; Internet; Laboratories; Matrices; National electric code; Parity check codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory, 2003. Proceedings. IEEE International Symposium on
Print_ISBN
0-7803-7728-1
Type
conf
DOI
10.1109/ISIT.2003.1228165
Filename
1228165
Link To Document