• DocumentCode
    2003590
  • Title

    Evolutionary design of analog circuits with a uniform-design based multi-objective adaptive genetic algorithm

  • Author

    Zhao, Shuguang ; Jiao, Licheng ; Zhao, Jianxum ; Wang, Yuping

  • Author_Institution
    Sch. of Electro. Eng., Xidian Univ., Xi´´an, China
  • fYear
    2005
  • fDate
    29 June-1 July 2005
  • Firstpage
    26
  • Lastpage
    29
  • Abstract
    A novel multi-objective genetic algorithm based approach for evolvable hardware (EHW) is proposed in this paper. It features intensive applications of the Uniform Design Technique (UDT) to fitness function composing and crossover operator construction for the sake of multiple uniform search directions, better quality of offspring and higher computation efficiency. With an efficient and universal representation scheme based on standard component values and PSpice Net-list, it supports generation and optimization of circuit structures and component values. Moreover, its search efficiency is enhanced by an adaptation technique of genetic parameters, which pays attention to both population diversity, loci´ effects and development of evolution. Both theoretic analyses and experimental results demonstrated its capability in finding out a set of Pareto-optimal solutions or effective design results via a shorter execution, and showed its potential in fully automated design of circuits concerning multi-objective requirements and preferences.
  • Keywords
    Pareto optimisation; analogue circuits; circuit optimisation; genetic algorithms; integrated circuit design; PSpice Net-list; Pareto-optimal solutions; Uniform Design Technique; analog circuits; circuit structure optimisation; computation efficiency; crossover operator construction; evolutionary design; evolvable hardware; fitness function; loci effects; multiobjective adaptive genetic algorithm; population diversity; Algorithm design and analysis; Analog circuits; Circuit synthesis; Design optimization; Equations; Evolutionary computation; Genetic algorithms; Hardware; Pareto analysis; Scattering;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Evolvable Hardware, 2005. Proceedings. 2005 NASA/DoD Conference on
  • ISSN
    1550-6029
  • Print_ISBN
    0-7695-2399-4
  • Type

    conf

  • DOI
    10.1109/EH.2005.48
  • Filename
    1508477