Configurable Flow Models for FPGA Particle Graphics Engines

We describe the implementation of a hardware-accelerated particle graphics engine on a reconfigurable computer. The engine incorporates a configurable flow model that enables the simulation of complex spatially-dependent particle graphics effects. The FPGA particle engine was designed using the Mitrion-C high-level language, and did not require detailed hardware design. The engine was implemented on a SGI Altix 350 with four Xilinx Virtex-4 LX200 FPGAs. The engine achieves speedups of 35 to 58 times over a 1.5 GHz Itanium 2 CPU when using one and four FPGAs respectively.