Hardware Compilation from Machine Code with M2V

Hardware compilation flows use a high-level language like C++ or Java and translate it directly to an HDL. In this paper we propose to split the problem in two; first use a regular compiler to do the front-end processing, then use the generated machine code to produce the HDL. The MIPS-to-Verilog (M2V) compiler translates blocks of MIPS machine code into a hardware design represented in Verilog. M2V is a three-pass compiler that accepts as input basic blocks extracted from MIPS ELF images and emits synthesizable Verilog for the eMIPS dynamically extensible processor. The compiler was implemented from scratch in C++. The quality of the synthesizable Verilog output compares favorably with hand-generated code for the same input.