DocumentCode :
2005553
Title :
An improved analytical yield evaluation method for redundant RAM´s
Author :
Battaglini, Gianluca ; Ciciani, Bruno
Author_Institution :
Dept. of Syst. & Comput. Eng., Rome Univ., Italy
fYear :
1998
fDate :
24-25 Aug 1998
Firstpage :
117
Lastpage :
123
Abstract :
A new stochastic method is introduced for calculating the manufacturing field of fault-tolerant VLSI/WSI systems. This method is an improvement on a previous method based on a Markov chain. This new method gives a higher lower bound value of the field with respect to other methods based on the same assumptions. This improvement is obtained by the consideration of reconfiguration strategies based on the knowledge of the fault patterns and the redundancy levels. The proposed method is easy to use in parametric studies of the field of a chip versus redundancy level and very versatile for inclusion in CAM/CAD programming environments
Keywords :
Markov processes; VLSI; fault tolerant computing; integrated circuit yield; integrated memory circuits; random-access storage; redundancy; wafer-scale integration; CAM/CAD programming environments; Markov chain; analytical yield evaluation method; fault patterns; fault-tolerant VLSI systems; fault-tolerant WSI systems; manufacturing field; reconfiguration strategies; redundancy levels; redundant RAM; stochastic method; Circuit faults; Fault tolerant systems; Manufacturing; Monte Carlo methods; Radio access networks; Read-write memory; Remuneration; Stochastic systems; Systems engineering and theory; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Technology, Design and Testing, 1998. Proceedings. International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-8494-1
Type :
conf
DOI :
10.1109/MTDT.1998.705957
Filename :
705957
Link To Document :
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