Title :
Automatic creation of domain-specific reconfigurable CPLDs for SoC
Author :
Holland, Mark ; Hauck, Scott
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
Reconfigurable logic fills a useful niche between the flexibility provided by a processor and the performance provided by custom hardware. This work presents the creation of domain-specific CPLD architectures, a project termed Totem-CPLD (part of the larger Totem project at UW). For the scope of this work, a CPLD is a collection of PLAs connected by a full crossbar, and they are made "domain-specific" by altering the input, product term, and output capacities of the PLAs in the architecture.
Keywords :
programmable logic arrays; reconfigurable architectures; system-on-chip; PLA; SoC; domain-specific reconfigurable CPLD architecture; programmable logic array; system-on-chip; Circuits; Computer architecture; Delay; Fabrics; Hardware; Logic testing; Programmable logic arrays; Protocols; Reconfigurable logic; Very large scale integration;
Conference_Titel :
Field-Programmable Custom Computing Machines, 2005. FCCM 2005. 13th Annual IEEE Symposium on
Print_ISBN :
0-7695-2445-1
DOI :
10.1109/FCCM.2005.23
