DocumentCode
2005793
Title
Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits
Author
Wunderlich, H.-J. ; Hellebrand, S.
Author_Institution
Inst. of Comput. Design & Fault-Tolerance, Karlsruhe Univ., West Germany
fYear
1988
fDate
27-30 June 1988
Firstpage
36
Lastpage
41
Abstract
A method based on linear feedback shift registers over finite fields is presented to generate for a natural number n a pattern sequence with minimal length detecting each m-multiple stuck-open faults for M>
Keywords
field effect integrated circuits; integrated circuit testing; logic testing; shift registers; built-in self-test; linear feedback shift registers; pattern sequences; pseudo-exhaustive test; stuck-open faults; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Hardware; Registers; Test pattern generators; Variable structure systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location
Tokyo, Japan
Print_ISBN
0-8186-0867-6
Type
conf
DOI
10.1109/FTCS.1988.5294
Filename
5294
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