DocumentCode :
2005858
Title :
Parallel hardware implementation of cellular learning automata based evolutionary computing (CLA-EC) on FPGA
Author :
Hariri, Arash ; Rastegar, Reza ; Zamani, Morteza Saheb ; Meybodi, Mohammad R.
Author_Institution :
Amirkabir Univ. of Technol., Tehran, Iran
fYear :
2005
fDate :
18-20 April 2005
Firstpage :
311
Lastpage :
313
Abstract :
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hardware-based applications including evolvable hardware. In this paper, based on the SIMD model, a parallel architecture is proposed and implemented on FPGA. Simulation results show that the proposed architecture can solve optimization problems thousands times faster than the sequential implementations.
Keywords :
cellular automata; field programmable gate arrays; learning automata; optimisation; parallel architectures; CLA-EC model; FPGA; SIMD model; cellular learning automata based evolutionary computing; optimization problems; parallel architecture; parallel hardware implementation; Bioinformatics; Computer architecture; Concurrent computing; Evolutionary computation; Field programmable gate arrays; Genomics; Hardware; Learning automata; Nearest neighbor searches; Parallel architectures;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Custom Computing Machines, 2005. FCCM 2005. 13th Annual IEEE Symposium on
Print_ISBN :
0-7695-2445-1
Type :
conf
DOI :
10.1109/FCCM.2005.51
Filename :
1508568
Link To Document :
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