Title :
FPGA implementation of graph cut based image thresholding
Author :
Anderson, Joseph ; Gundam, Madhuri ; Joginipelly, Arjun ; Charalampidis, Dimitrios
Author_Institution :
St. Vincent Coll., Latrobe, PA, USA
Abstract :
Thresholding is an important process in many image processing applications. Recently, a bi-level image thresholding method based on graph cut was proposed. The method provided thresholding results which were superior to those obtained with previous techniques. Moreover, the technique was computationally less complex compared to other graph cut-based image thresholding approaches. However, the execution time requirements may still be significant, especially if it is of interest to perform real-time thresholding of a large number of images, such as in the case of high-resolution video sequences. In this paper, we propose a method based on the previously proposed graph cut thresholding method, which is nevertheless appropriate for hardware (FPGA) real-time implementations. A subset of the proposed modifications are also appropriate for a general software implementation. Considering only this subset, the C implementation of the modified method is approximately 2.2 times faster than the original method, as it was presented in the original graph cut-based thresholding paper. Furthermore, the FPGA-based implementation is designed to be 70-100 times faster than the software implementation, depending on the image used.
Keywords :
field programmable gate arrays; graph theory; image processing; FPGA implementation; bilevel image thresholding; general software implementation; graph cut thresholding; hardware real-time implementation; high resolution video sequences; image processing; Clocks; Educational institutions; Field programmable gate arrays; Hardware; Histograms; Image edge detection; Software;
Conference_Titel :
System Theory (SSST), 2012 44th Southeastern Symposium on
Conference_Location :
Jacksonville, FL
Print_ISBN :
978-1-4577-1492-4
DOI :
10.1109/SSST.2012.6195155