• DocumentCode
    2007947
  • Title

    Single stage buck-boost DC-AC neutral point clamped inverter

  • Author

    Wei, Mo ; Chiang, Loh Poh ; Andrew ; Blaabjerg, Frede

  • Author_Institution
    Electr. & Electron. Eng, Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2012
  • fDate
    15-20 Sept. 2012
  • Firstpage
    318
  • Lastpage
    323
  • Abstract
    This paper proposes a new single stage buck-boost DC-AC neutral point clamped inverter topology which integrates the cascaded configurations of recently introduced inductor-capacitor-capacitor-transformer impedance source network (by Adamowicz) and classic NPC configuration. As a consequence, it has enhanced buck-boost functionality and low output voltage distortions compared to the traditional Z-source inverter; it has continuous input current which reduces the source stress and inverter noise; it also contains two built-in capacitors which can block the DC current in the transformer windings thus preventing the core from saturation; lowers the voltage stresses and power losses of inverter switches and reduces the sizes of filtering devices and as well as obtains better output performance compared to the original two-level Z-source inverters. A phase disposition pulse width modulation technique with minimum switching counts is implemented for the proposed topology. Simulation results as well as experimental results are presented to verify the behaviors of proposed configuration.
  • Keywords
    PWM invertors; power transformers; transformer windings; DC current; built-in capacitors; classic NPC configuration; continuous input current; enhanced buck-boost functionality; filtering device reduction; inductor-capacitor-capacitor-transformer impedance source network; inverter noise; inverter switches; low-output voltage distortions; phase disposition pulse width modulation technique; power loss; single-stage buck-boost DC-AC neutral point clamped inverter; source stress; switching counts; traditional Z-source inverter; transformer windings; two-level Z-source inverters; voltage stress; Capacitors; Circuit faults; Impedance; Inductors; Inverters; Switches; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Energy Conversion Congress and Exposition (ECCE), 2012 IEEE
  • Conference_Location
    Raleigh, NC
  • Print_ISBN
    978-1-4673-0802-1
  • Electronic_ISBN
    978-1-4673-0801-4
  • Type

    conf

  • DOI
    10.1109/ECCE.2012.6342806
  • Filename
    6342806