Analysis and design of low-power multi-threshold MCML

Author

Hassan, Hassan ; Anis, Mohab ; Elmasry, Mohamed

Author_Institution

VLSI Res. Group, Waterloo Univ., Ont., Canada

fYear

2004

fDate

12-15 Sept. 2004

Firstpage

25

Lastpage

29

Abstract

Multi-threshold MOS current mode logic (MTMCML) is a natural evolution for MCML that offers power saving through supply voltage reduction while retaining the same performance. In this work, analytical formulation based on the BSIM3v3 model is proposed for MTMCML with error within 10% compared to HSPICE. The formulation helps designers to efficiently design MTMCML circuits without undergoing the time-consuming HSPICE simulations. Furthermore, it provides design guidelines and aids for designers to fully understand the different tradeoffs in MTMCML design. In addition, the analysis is extended to study the impact of technology scaling and parameter variations on MTMCML. It is shown that the worst case variation in the minimum supply voltage of MTMCML is 1.16%, thus suggesting maximal power saving.

Keywords

MOS logic circuits; circuit simulation; current-mode circuits; integrated circuit design; low-power electronics; BSIM3v3 model; MOS current mode logic; MTMCML circuit design; low-power multithreshold MCML; parameter variations; power saving; supply voltage reduction; technology scaling; CMOS logic circuits; CMOS technology; Explosions; Guidelines; Power dissipation; Power supplies; System-on-a-chip; Very large scale integration; Voltage; Zinc;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2004. Proceedings. IEEE International

Print_ISBN

0-7803-8445-8

Type

conf

DOI

10.1109/SOCC.2004.1362338

Filename

1362338