DocumentCode
2008276
Title
A compact high frequency VLSI differential analog adder
Author
Diaz-Sanchez, Alejandro ; Ramirez-Angulo, Jaime
Author_Institution
Centro Nacional de Investigacion y Desarrollo Technol., Morelos, Mexico
Volume
1
fYear
1996
fDate
18-21 Aug 1996
Firstpage
21
Abstract
The design and implementation of a VLSI analog voltage adder is described. The compactness of the proposed approach allows the addition of two high frequency voltage signals for applications in both continuous-time and sample data filters. Such operations are made with a good low-distortion performance. The voltage adder is designed for 2 μm n-well technology in a MOSIS process and works with power supplies of ∓2.5 volts
Keywords
CMOS analogue integrated circuits; VLSI; adders; analogue processing circuits; -2.5 V; 2 micron; 2.5 V; HF analog voltage adder; MOSIS process; VLSI differential analog adder; continuous-time filters; high frequency analog adder; low-distortion performance; n-well technology; sample data filters; Adders; Circuit topology; Equations; Frequency; Matched filters; Operational amplifiers; Power supplies; Signal processing; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location
Ames, IA
Print_ISBN
0-7803-3636-4
Type
conf
DOI
10.1109/MWSCAS.1996.594015
Filename
594015
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