• DocumentCode
    2008398
  • Title

    Process Integration for a 2ns Cycle/4ns Access 512K CMOS SRAM

  • Author

    Joshi, R. ; Klepner, S. ; Basavaiah, S. ; Ray, A. ; Petrillo, K. ; Mazzeo, N. ; Bucelot, T. ; Brodsky, S. ; Jaso, M. ; Brunner, T. ; Petrillo, E. ; Stein, K. ; Lii, T. ; Franch, R. ; Chappell, B. ; Chappell, T. ; Schuster, S.

  • Author_Institution
    IBM Research Division, New York
  • fYear
    1991
  • fDate
    28-30 May 1991
  • Firstpage
    31
  • Lastpage
    32
  • Keywords
    CMOS process; CMOS technology; Circuits; Delay; Etching; Fabrication; Lenses; Random access memory; Silicides; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1991. Digest of Technical Papers., 1991 Symposium on
  • Conference_Location
    Oiso, Japan
  • Type

    conf

  • DOI
    10.1109/VLSIT.1991.705975
  • Filename
    705975
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2008398