DocumentCode
2008996
Title
A 0.13μm 1Gb/s/channel store-and-forward network on-chip
Author
Mondinelli, Filippo ; Borgatti, Michele ; Vajna, Zsolt M Kovacs
Author_Institution
Dept. of Electron. Eng., Brescia Univ., Italy
fYear
2004
fDate
12-15 Sept. 2004
Firstpage
141
Lastpage
142
Abstract
A parametric packed-switched scalable network on chip allows energy/throughput/latency tradeoff for data-intensive communication-centric systems. At a clock rate of 200MHz the network guarantees block-free average 1 Gb/s per channel. The test chip includes 64-interfaces network on chip and traffic generators.
Keywords
multiprocessor interconnection networks; system-on-chip; 200 MHz; data-intensive communication-centric systems; parametric packed-switched scalable network on chip; store-and-forward network on-chip; Buffer storage; Communication switching; Computer networks; Energy efficiency; Network-on-a-chip; Routing; Switches; Telecommunication traffic; Testing; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2004. Proceedings. IEEE International
Print_ISBN
0-7803-8445-8
Type
conf
DOI
10.1109/SOCC.2004.1362381
Filename
1362381
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