DocumentCode
2009273
Title
Robust multi-phase clock generation with reduced jitter
Author
Folkesson, Kalle ; Svensson, Christer
Author_Institution
Dept. of Electr. Eng., Linkoping Univ., Sweden
fYear
2004
fDate
12-15 Sept. 2004
Firstpage
167
Lastpage
168
Abstract
A very flexible multiphase clock generation circuit is proposed. It is aimed for applications where very accurate phase shifts and low jitter is required, such as time-interleaved samplers and multistandard radio receivers. Robustness to supply voltage variation for phase shifts and jitter performance is demonstrated with simulations as well as measurements.
Keywords
jitter; multipath channels; phase shifters; radio receivers; jitter reduction; multiphase clock generation circuit; multistandard radio receivers; phase shifts; supply voltage variation; time-interleaved samplers; Circuit simulation; Clocks; Frequency; Image sampling; Jitter; Phase measurement; Receivers; Robustness; Signal generators; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2004. Proceedings. IEEE International
Print_ISBN
0-7803-8445-8
Type
conf
DOI
10.1109/SOCC.2004.1362393
Filename
1362393
Link To Document