• DocumentCode
    2009360
  • Title

    Networks-on-chip in emerging interconnect paradigms: Advantages and challenges

  • Author

    Carloni, Luca P. ; Pande, Partha ; Xie, Yuan

  • Author_Institution
    Columbia Univ., New York, NY
  • fYear
    2009
  • fDate
    10-13 May 2009
  • Firstpage
    93
  • Lastpage
    102
  • Abstract
    Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simplify and optimize SoC design. However, it is expected that improving traditional communication technologies and interconnect organizations will not be sufficient to satisfy the demand for energy-efficient and high-performance interconnect fabrics, which continues to grow with each new process generation. Multiple options have been envisioned as compelling alternatives to the existing planar metal/dielectric communication structures. In this paper we outline the opportunities and challenges associated with three emerging interconnect paradigms: three-dimensional (3-D) integration, nanophotonic communication, and wireless interconnects.
  • Keywords
    multiprocessor interconnection networks; nanophotonics; network-on-chip; optical communication; radio access networks; interconnect paradigms; multicore systems-on-chip; nanophotonic communication; networks-on-chip; three-dimensional integration; wireless interconnects; CMOS technology; Delay effects; Dielectric materials; Fabrics; Integrated circuit interconnections; Integrated circuit technology; Network-on-a-chip; Switches; Three-dimensional integrated circuits; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Networks-on-Chip, 2009. NoCS 2009. 3rd ACM/IEEE International Symposium on
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    978-1-4244-4142-6
  • Electronic_ISBN
    978-1-4244-4143-3
  • Type

    conf

  • DOI
    10.1109/NOCS.2009.5071456
  • Filename
    5071456