DocumentCode
2009689
Title
Control speculation in multithreaded processors through dynamic loop detection
Author
Tubella, Jordi ; Gonzalez, Antonio
Author_Institution
Dept. d´´Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
fYear
1998
fDate
1-4 Feb 1998
Firstpage
14
Lastpage
23
Abstract
This paper presents a mechanism to dynamically detect the loops that are executed in a program. This technique detects the beginning and the termination of the iterations and executions of the loops without compiler/user intervention. We propose to apply this dynamic loop detection to the speculation of multiple threads of control dynamically obtained from a sequential program. Based an the highly predictable behavior of the loops, the history of the past executed loops is used to speculate the future instruction sequence. The overall objective is to dynamically obtain coarse grain parallelism (at the thread level) that can be exploited by a multithreaded architecture. We show that for a 4-context multithreaded processor the speculation mechanism provides around 2.6 concurrent threads in average
Keywords
instruction sets; parallel architectures; coarse grain parallelism; control speculation; dynamic loop detection; instruction sequence; multithreaded processors; Concrete; Electronic mail; Hardware; History; Microprocessors; Parallel processing; Performance analysis; Program processors; Proposals; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Performance Computer Architecture, 1998. Proceedings., 1998 Fourth International Symposium on
Conference_Location
Las Vegas, NV
Print_ISBN
0-8186-8323-6
Type
conf
DOI
10.1109/HPCA.1998.650542
Filename
650542
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