DocumentCode :
2009887
Title :
Home-based SVM protocols for SMP clusters: Design and performance
Author :
Samanta, Rudrajit ; Bilas, Angelos ; Iftode, Liviu ; Singh, Jaswinder Pal
Author_Institution :
Dept. of Comput. Sci., Princeton Univ., NJ, USA
fYear :
1998
fDate :
1-4 Feb 1998
Firstpage :
113
Lastpage :
124
Abstract :
As small-scale shared memory multiprocessors proliferate in the market, it is very attractive to construct large-scale systems by connecting smaller multiprocessors together in software using efficient commodity, network interfaces and networks. Using a shared virtual memory (SVM) layer for this purpose preserves the attractive shared memory programming abstraction across nodes. In this paper: We describe home-based SVM protocols that support symmetric multiprocessor (SMP) nodes, taking advantage of the intra-node hardware cache coherence and synchronization mechanisms. Our protocols take no special advantage of the network interface and network except as a fast communication link, and as such are very portable. We present the key design tradeoffs, discuss our choices, and describe key data structures that enable us to implement these choices quite simply. We present an implementation on a network of 4-way Intel PentiumPro SMPs interconnected with Myrinet, and provide performance results. We explore the advantages of SMP nodes over uniprocessor nodes with this protocol, as well as other performance tradeoffs, through both real implementation and simulation as appropriate, since both have important roles to play. We find one approach to deliver good parallel performance on many real applications (at least at the scale we examine) and to improve performance over SVM across uniprocessor nodes
Keywords :
data structures; network interfaces; protocols; synchronisation; virtual storage; Intel PentiumPro SMPs; Myrinet; SMP clusters; data structures; design; hardware cache coherence; home-based SVM protocols; network interface; network interfaces; parallel performance; performance; shared memory multiprocessors; shared memory programming; shared virtual memory; synchronization mechanisms; uniprocessor nodes; Coherence; Computer science; Hardware; Home computing; Identity-based encryption; Joining processes; Protocols; Support vector machines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computer Architecture, 1998. Proceedings., 1998 Fourth International Symposium on
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-8186-8323-6
Type :
conf
DOI :
10.1109/HPCA.1998.650551
Filename :
650551
Link To Document :
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