A RISC implementation of MPEG-2 TS packetization

The authors present a hybrid hardware/software implementation for packetizing of MPEG-2 based video and audio ES to Transport Stream (TS). We have achieved one program TS packetization using DSP chips before. In that configuration, two 16-bit fixed-point DSP chips are needed for video and audio PES, TS packetization and formation, respectively (Yong Ji and Zhaohui Cai, 1998). In this design, we integrate these two function units into one programmable chip. We propose a novel implementation using a customized 16-bit RISC processor. Glue logic is also integrated in the same chip to enhance reliability and efficiency.