Constraint satisfaction for test program generation

Author

Lewin, Daniel ; Fournier, L. ; Levinger, Moshe ; Roytman, Evgeny ; Shurek, Gil

Author_Institution

IBM Israel Sci. & Technol. Center, Haifa, Israel

fYear

1995

fDate

28-31 Mar 1995

Firstpage

45

Lastpage

48

Abstract

A central problem in automatic test generation is solving constraints for memory access generation. A framework, and an algorithm that has been implemented in the Model-Based Test-Generator are described. This generic algorithm allows flexibility in modeling new addressing modes with which memory accesses are generated. The algorithm currently handles address constraint satisfaction for complex addressing modes in the PowerPC, x86, and other architectures

Keywords

automatic test software; computer testing; formal specification; formal verification; integrated circuit testing; virtual machines; Model-Based Test-Generator; PowerPC; address constraint satisfaction; addressing modes; automatic test generation; complex addressing modes; generic algorithm; memory access generation; test program generation; Automatic testing; Computer architecture; Gas insulated transmission lines; Heart; Laboratories; Memory management; Power system modeling; Predictive models; Registers; Software testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computers and Communications, 1995., Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix Conference on

Conference_Location

Scottsdale, AZ

Print_ISBN

0-7803-2492-7

Type

conf

DOI

10.1109/PCCC.1995.472513

Filename

472513