Title :
50 nm scale etching of Si and SiO/sub 2/ with the low angle forward reflected neutral beam
Author :
Lee, D.H. ; Park, S.D. ; Jung, S.J. ; Yeom, G.Y.
Author_Institution :
Dept. of Mater. Eng., Sungkyunkwan Univ., Suwon, South Korea
Abstract :
Summary form only given, as follows. Plasma etching is one of the key technologies in the fabrication of deep submicron silicon-based integrated circuits. However, plasma etching has a serious disadvantage due to the energetic charged particle such as positive ion, and photons generated in the plasma.
Keywords :
elemental semiconductors; integrated circuit technology; monolithic integrated circuits; silicon; silicon compounds; sputter etching; 50 nm; Si; SiO/sub 2/; deep submicron integrated circuits; low angle forward reflected neutral beam; plasma etching; Discrete wavelet transforms; Etching; Neural networks; Plasma applications; Plasma devices; Plasma materials processing; Plasma waves; Predictive models; Scanning electron microscopy; Semiconductor device modeling;
Conference_Titel :
Plasma Science, 2003. ICOPS 2003. IEEE Conference Record - Abstracts. The 30th International Conference on
Conference_Location :
Jeju, South Korea
Print_ISBN :
0-7803-7911-X
DOI :
10.1109/PLASMA.2003.1228546
