Title :
Electrical property improvements of ultra low-k ILD using a silylation process feasible for process integration.
Author :
Thomas, Oszinda ; Schaller, Matthias ; Gerlich, Lukas ; Fischer, Daniel ; Leppack, Susanne ; Bartsch, Christin ; Schulz, Stefan E.
Author_Institution :
Fraunhofer Center Nanoelektronische Technol., Dresden, Germany
Abstract :
In this paper the effect of a vapor phase based silylation process on patterned test structures using ULK based ILD´s was investigated. It was found that the resistance to capacitance (RC) behavior can be improved. This improvement was found to be scalable, meaning with decreasing metal pitch the RC improvement increases. The silylation process provides in addition a decrease of the leakage current and was found to have adequate defectivity. As the process is feasible for production and the improvement of the electrical properties increases with smaller feature size, it can be assumed that extra costs of the restoration process will be paid out for future technology nodes, if ULK as an ILD is used.
Keywords :
electric properties; leakage currents; low-k dielectric thin films; electrical property; leakage current; metal pitch; patterned test structures; process integration; ultra low-k ILD; vapor phase based silylation process; Carbon; Chemicals; Films; Maintenance engineering; Metals; Plasmas; Surface treatment;
Conference_Titel :
Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International
Conference_Location :
Dresden
Print_ISBN :
978-1-4577-0503-8
DOI :
10.1109/IITC.2011.5940329