• DocumentCode
    2010337
  • Title

    Relevance of electromigration wafer level test for advanced CMOS interconnects reliability control

  • Author

    Bana, F. ; Petitprez, E. ; Ney, D. ; Arnaud, L. ; Wouters, Y.

  • Author_Institution
    ST Microelectron., Crolles, France
  • fYear
    2011
  • fDate
    8-12 May 2011
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    The work presented in this paper compares electromigration results from standard wafer level and package level tests. Dual damascene low-k Cu lines with different processes have been tested and correlation between both testing methods is evaluated. Results from wafer level reliability and package level reliability are compared around lifetime variations and standard deviation. Only limited correlation is found, strengthening the need of defining new reliable electromigration testing methods compatible with an industrial environment. Comparison between failures mechanisms involved in each testing method is also addressed.
  • Keywords
    CMOS integrated circuits; electromigration; failure analysis; integrated circuit interconnections; integrated circuit reliability; advanced CMOS interconnects reliability; dual damascene low-k Cu lines; electromigration testing; electromigration wafer level test; failures mechanisms; package level reliability; wafer level reliability; Correlation; Electromigration; Failure analysis; Life estimation; Semiconductor device reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International
  • Conference_Location
    Dresden
  • ISSN
    pending
  • Print_ISBN
    978-1-4577-0503-8
  • Type

    conf

  • DOI
    10.1109/IITC.2011.5940334
  • Filename
    5940334