A compensation technique for transistor mismatch in current mirrors

Author

Bandi, Sripriya R. ; Mukund, P.R.

Author_Institution

Dept. of Electr. Eng., Rochester Inst. of Technol., NY, USA

fYear

2004

fDate

12-15 Sept. 2004

Firstpage

320

Lastpage

323

Abstract

A compensation technique to correct the mismatch in the current mirrors due to transistor process parameter variations is presented. The compensation is achieved by varying the drain voltage of the mirroring transistors. This method is implemented by just adding a single transistor, operating in the linear region at the drain of the mirroring transistor. The circuit is simulated for a threshold voltage mismatch of ±10%. The simulation results show that the percentage error in the mirrored currents reduced from 48% to 3% for a threshold voltage mismatch of +10% and from 70% to 10% for a threshold voltage mismatch of -10%, for a wide range of input current values. The affect of temperature on the performance of the circuit is studied. The power consumption with and without the compensation transistor is compared. The compensation technique is successfully implemented in a CMOS image sensor.

Keywords

CMOS image sensors; analogue circuits; circuit simulation; compensation; current mirrors; transistor circuits; CMOS image sensor; compensation technique; compensation transistor; current mirrors; drain voltage; mirrored currents; mirroring transistor; mismatch correction; power consumption; single transistor; transistor mismatch; transistor process parameter variations; Analytical models; CMOS image sensors; Circuit simulation; Energy consumption; Mirrors; Resistors; Switches; Temperature sensors; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2004. Proceedings. IEEE International

Print_ISBN

0-7803-8445-8

Type

conf

DOI

10.1109/SOCC.2004.1362449

Filename

1362449