• DocumentCode
    2010618
  • Title

    A Task Parallel Algorithm for Computing the Costs of All-Pairs Shortest Paths on the CUDA-Compatible GPU

  • Author

    Okuyama, Tomohiro ; Ino, Fumihiko ; Hagihara, Kenichi

  • Author_Institution
    Grad. Sch. of Inf. Sci. & Technol., Osaka Univ., Toyonaka
  • fYear
    2008
  • fDate
    10-12 Dec. 2008
  • Firstpage
    284
  • Lastpage
    291
  • Abstract
    This paper proposes a fast method for computing the costs of all-pairs shortest paths (APSPs) on the graphics processing unit (GPU). The proposed method is implemented using compute unified device architecture (CUDA), which offers us a development environment for performing general-purpose computation on the GPU. Our method is based on Harish´s iterative algorithm that computes the cost of the single-source shortest path (SSSP) for every source vertex. We present that exploiting task parallelism in the APSP problem allows us to efficiently use on-chip memory in the GPU, reducing the amount of data being transferred from relatively slower off-chip memory. Furthermore, our task parallel scheme is useful to exploit a higher parallelism, increasing the efficiency with highly threaded code. As a result, our method is 3.4--15 times faster than the prior method. Using on-chip memory, our method eliminates approximately 20% of data loads from off-chip memory.
  • Keywords
    computational complexity; computer graphic equipment; graph theory; iterative methods; multi-threading; parallel algorithms; CUDA; GPU; Harish iterative algorithm; all-pairs shortest path cost computing; compute unified device architecture; graphics processing unit; on-chip memory; task parallel algorithm; threaded code; Computer architecture; Concurrent computing; Costs; Distributed computing; Field programmable gate arrays; Graphics; Hardware; Iterative algorithms; Parallel algorithms; Parallel processing; All-pairs shortest path; CUDA; GPU; acceleration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing with Applications, 2008. ISPA '08. International Symposium on
  • Conference_Location
    Sydney, NSW
  • Print_ISBN
    978-0-7695-3471-8
  • Type

    conf

  • DOI
    10.1109/ISPA.2008.40
  • Filename
    4725159